The present disclosure relates generally to information handling systems, and more particularly to configuring communication couplings between processor(s) and endpoint(s) in an information handling system.
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Information handling systems such as, for example, server devices, may be configured to include multiple processors and utilize a Non-Uniform Memory Access (NUMA) computer memory design in which each processor is provided a local memory that it can access quickly, with those processors coupled together via processor interconnects (e.g., Ultra-Path Interconnects (UPIs) available in processing systems provided by INTEL® Corporation of Santa Clara, Calif., United States) that allow the processors to access memory that is local to the other processors. Furthermore, such server devices may be provided with multi-endpoint adapter devices that provide a plurality of endpoints (e.g., PCIe endpoints). Conventionally, the processors are coupled to the multi-endpoint adapter devices via hardware with fixed/static communication couplings in order to allow those processors to communicate with the endpoints to utilize resources available via those endpoints. The use of fixed/static communication couplings between the processors and endpoints prevents the scaling of server device (e.g., to provide additional processors in that server device) and does not take into account the endpoint devices connected to the processors. Furthermore, the fixed/static communication couplings can result in the use of the processor interconnects in endpoint communications, which reduces throughput via the processor interconnects (which are meant to allow processors to access neighboring processor root complexes) and increase latency in those communications. Further still, the fixed/static communication couplings in conventional systems require different hardware devices (e.g., motherboards and riser devices) for the server device in order to enable different processor/endpoint configurations.
Accordingly, it would be desirable to provide a processor/endpoint communication coupling configuration system.